1. Field of the Invention
The present invention generally relates to a punch type substrate strip, and more particularly to a punch type substrate strip, wherein the layout space of broken ends of the plating traces can be increased after plating.
2. Description of the Related Art
A conventional punch type substrate strip includes a plurality of substrate units which are integrated thereon. The substrate units function as chip carriers for manufacturing various integrated circuit (IC) packages or integrated circuit (IC) modules. Then, the IC packages or the IC modules are separated from each other by means of punching. Since the size of the IC package is gradually minimized, the density for the circuit layout of the substrate unit is gradually increased. Relatively, the space of the circuit layout is gradually reduced. If the inner circuit of the substrate unit is directly changed, then the electrical communication, the electrical shield, the added cost of circuit layers and the strength of the combined dielectric layers of the substrate unit are affected. Thus, it is important to improve the spaces of two side edges of the substrate strip in order to avoid changing the inner circuit of the substrate unit. Otherwise, the original design of the final product will be affected.
Taiwan Patent Number 1246380, entitled “Fabrication Method of a Printed Circuit Board”, discloses a method for making a broken circuit of a conductive finger. A plating trace is adapted for electrically connecting a ground/power line to a plating bus located around a printed circuit board. Furthermore, a transmission line (i.e. additional line of the plating trace) is adapted for electrically connecting a ground/power line to a conductive finger. Then, a solder mask is patterned and formed so as to specially expose out the conductive finger and to cover the transmission line, whereby the conductive finger is plated. Then, the transmission line is removed by means of etching so as to form a broken circuit between the conductive finger and the plating bus, thereby prevent the conductive finger (or the inner circuit connected thereto) from damage of electrostatic discharge. The broken circuit is located at the original location of the transmission line and inside the printed circuit board, and thus the design of the inner circuit of the substrate has been changed and the manufacturing processes have been increased. In addition, the printed circuit board has no slots, and thus the method for making the broken circuit of the conductive finger cannot be applied to a punch type substrate strip.
Furthermore, Taiwan Patent Publication Number 479334, entitled “Method for Manufacturing Plating Traces for Ball Grid Array Chip Package”, discloses a method for making broken circuits of plating traces. In the prior art, a punch type substrate strip includes a plurality of plating traces adapted for respectively electrically connecting conductive fingers to a plating bus located outside substrate units. After a plating process, a slot is formed in next process and located at the original location of the plating bus, whereby the broken circuits of the plating traces are formed, and thus the plating traces are respectively electrically isolated. However, the layout of most of the plating traces is restricted by the length of the slot.
As shown in FIG. 1, a conventional punch type substrate strip 1 includes a plurality of substrate units 10. Also, the punch type substrate strip 1 includes a plurality of slots 20, which are formed around the substrate units 10, so as to be conveniently punched. The substrate strip 1 is provided with a plurality of connecting pads 11 and a plurality of plating traces 12. The connecting pads 11 are disposed in the substrate units 10, and the plating traces 12 are electrically connected to the connecting pads 11. The plating traces 12 have a plurality of broken ends 12A located at the inner long edge 21 of the slot 20. When the layout space of the plating traces 12 is not enough, it is necessary that a plurality of plating traces 13 are laterally extended to the inner short edge 22 of the slot 20. The plating traces 13 also have a plurality of broken ends 13A at the inner short edge 22 of the slot 20. The amount of the broken ends 13A is restricted by the width of the inner short edge 22 of the slot 20, and thus there is not more extensive space for dense plating traces to be provided.
Accordingly, there exists a need for a punch type substrate strip capable of solving the above-mentioned problems.